2011/11/07

module top;
system_clock #200 clock2(A);
system_clock #100 clock3(B);
system_clock #400 clock1(Cin);
adder  mml(Cout,Sum,Cin,A,B);
endmodule

module adder(Cout,Sum,Cin,A,B);
input A,B,Cin;
output Cout,Sum;
and(sel_01,A,B);
xor(sel_02,A,B);
and(sel_03,sel_02,Cin);
or(Cout,sel_01,sel_03);
xor(Sum,sel_02,Cin);
endmodule


module system_clock(clk);
parameter PERIOD=100;
output clk;
reg clk;
initial
clk=0;
always
begin
#(PERIOD/2)clk=~clk;
end
always@(posedge clk)
if($time>1000)
$stop;
endmodule